Programmierbare Logik-ICs
Preis (Netto) | Beschreibung | Produkt-Details |
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CPLD 5M240ZT100C5N, MAX V 192 Makrozellen 79 I/O Flash ISP, 7.5ns TQFP 100-Pin
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CPLD 5M240ZT100C5N, MAX V 192 Makrozellen 79 I/O Flash ISP, 7.5ns TQFP 100-Pin
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CPLD 5M40ZE64C4N, MAX V 32 Makrozellen 30 I/O Flash ISP, 7.9ns EQFP 64-Pin
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FPGA EP4CE6E22C8N, Cyclone IV E 6272 Cells, 392 Blocks, EQFP 144-Pin 270kbit
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FPGA EP4CE6E22C8N, Cyclone IV E 6272 Cells, 392 Blocks, EQFP 144-Pin 270kbit
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CPLD 5M40ZE64C4N, MAX V 32 Makrozellen 30 I/O Flash ISP, 7.9ns EQFP 64-Pin
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CPLD 5M570ZT100C5N, MAX V 440 Makrozellen 74 I/O Flash ISP, 9ns TQFP 100-Pin
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CPLD 5M570ZT100C5N, MAX V 440 Makrozellen 74 I/O Flash ISP, 9ns TQFP 100-Pin
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CPLD 5M240ZT100C4N, MAX V 192 Makrozellen 79 I/O Flash ISP, 7.9ns TQFP 100-Pin
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CPLD 5M240ZT100C4N, MAX V 192 Makrozellen 79 I/O Flash ISP, 7.9ns TQFP 100-Pin
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Altera Konfigurationsspeicher EPCS64SI16N, 20MHz SOIC 16-Pin, 10.3 x 7.5 x 2.55mm
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Programmierbare Logik 5M40ZM64C5N, MAX V 32 Makrozellen 30 I/O Flash ISP, 14ns MBGA 64-Pin
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CPLD 5M80ZT100C5N, MAX V 64 Makrozellen 79 I/O Flash ISP, 7.5ns TQFP 100-Pin
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FPGA 5CEBA4F17C8N, Cyclone V 49000 Gates, 49000 Cells, 18480 Blocks, FBGA 256-Pin 3464192
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CPLD EPM570T144C5N, MAX II 440 Makrozellen 116 I/O Flash ISP, TQFP 144-Pin
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CPLD 5M160ZE64C4N, MAX V 128 Makrozellen 54 I/O Flash ISP, 7.9ns EQFP 64-Pin
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FPGA EP4CE30F23C8N, Cyclone IV E 28848 Cells, 1803 Blocks, FBGA 484-Pin 594kbit
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CPLD EPM570T144C5N, MAX II 440 Makrozellen 116 I/O Flash ISP, TQFP 144-Pin
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FPGA 5CEBA4F17C8N, Cyclone V 49000 Gates, 49000 Cells, 18480 Blocks, FBGA 256-Pin 3464192
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CPLD 5M80ZT100C5N, MAX V 64 Makrozellen 79 I/O Flash ISP, 7.5ns TQFP 100-Pin
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